fcml  1.1.3
Classes | Macros | Typedefs | Enumerations
fcml_common.h File Reference

Definitions of common structures used by FCML components. More...

#include "fcml_lib_export.h"
#include "fcml_types.h"
#include "fcml_instructions.h"

Go to the source code of this file.

Classes

struct  fcml_st_register
 Structure describes x86_64 register. More...
 
struct  fcml_st_condition
 Defines instruction's condition. More...
 
struct  fcml_st_nullable_size_flags
 Nullable wrapper for mask of size flags. More...
 
struct  fcml_st_far_pointer
 Representation of far pointer operand. More...
 
struct  fcml_st_offset
 Absolute offset. More...
 
struct  fcml_st_effective_address
 Effective address. More...
 
struct  fcml_st_segment_selector
 Describes segment register. More...
 
struct  fcml_st_address
 Generic memory addressing operator. More...
 
struct  fcml_st_operand
 Instruction operand. More...
 
struct  fcml_st_instruction
 Generic instruction model. More...
 
struct  fcml_st_instruction_code
 An encoded instruction. More...
 
struct  fcml_st_entry_point
 Describes address of an instruction code. More...
 

Macros

#define FCML_OPERANDS_COUNT   5
 Maximal number of the instruction operands. More...
 
#define FCML_INSTRUCTION_SIZE   15
 Maximal number of bytes instruction can use. More...
 
#define FCML_OPCODES_NUM   3
 Number of opcode bytes. More...
 
#define FCML_PREFIX_LOCK   0x0001
 LOCK prefix (0xF0)
 
#define FCML_PREFIX_REPNE   0x0002
 REPNE prefix (0xF2)
 
#define FCML_PREFIX_REPNZ   FCML_PREFIX_REPNE
 REPNZ prefix (0xF2)
 
#define FCML_PREFIX_REP   0x0004
 REP prefix (0xF3)
 
#define FCML_PREFIX_REPE   FCML_PREFIX_REP
 REPE prefix (0xF3)
 
#define FCML_PREFIX_REPZ   FCML_PREFIX_REP
 REPZ prefix (0xF3)
 
#define FCML_PREFIX_XACQUIRE   0x0008
 XACQUIRE prefix (0xF2)
 
#define FCML_PREFIX_XRELEASE   0x0010
 XRELEASE prefix (0xF3)
 
#define FCML_PREFIX_BRANCH_HINT   0x0020
 branch hint (0x2E) (SSE2 extension)
 
#define FCML_PREFIX_NOBRANCH_HINT   0x0040
 nobranch hint (0x3E) (SSE2 extension)
 
#define FCML_REG_AL   0
 
#define FCML_REG_AX   0
 
#define FCML_REG_EAX   0
 
#define FCML_REG_RAX   0
 
#define FCML_REG_MM0   0
 
#define FCML_REG_XMM0   0
 
#define FCML_REG_YMM0   0
 
#define FCML_REG_CL   1
 
#define FCML_REG_CX   1
 
#define FCML_REG_ECX   1
 
#define FCML_REG_RCX   1
 
#define FCML_REG_MM1   1
 
#define FCML_REG_XMM1   1
 
#define FCML_REG_YMM1   1
 
#define FCML_REG_DL   2
 
#define FCML_REG_DX   2
 
#define FCML_REG_EDX   2
 
#define FCML_REG_RDX   2
 
#define FCML_REG_MM2   2
 
#define FCML_REG_XMM2   2
 
#define FCML_REG_YMM2   2
 
#define FCML_REG_BL   3
 
#define FCML_REG_BX   3
 
#define FCML_REG_EBX   3
 
#define FCML_REG_RBX   3
 
#define FCML_REG_MM3   3
 
#define FCML_REG_XMM3   3
 
#define FCML_REG_YMM3   3
 
#define FCML_REG_AH   4
 
#define FCML_REG_SP   4
 
#define FCML_REG_SPL   4
 
#define FCML_REG_ESP   4
 
#define FCML_REG_RSP   4
 
#define FCML_REG_MM4   4
 
#define FCML_REG_XMM4   4
 
#define FCML_REG_YMM4   4
 
#define FCML_REG_CH   5
 
#define FCML_REG_BP   5
 
#define FCML_REG_BPL   5
 
#define FCML_REG_EBP   5
 
#define FCML_REG_RBP   5
 
#define FCML_REG_MM5   5
 
#define FCML_REG_XMM5   5
 
#define FCML_REG_YMM5   5
 
#define FCML_REG_DH   6
 
#define FCML_REG_SI   6
 
#define FCML_REG_SIL   6
 
#define FCML_REG_ESI   6
 
#define FCML_REG_RSI   6
 
#define FCML_REG_MM6   6
 
#define FCML_REG_XMM6   6
 
#define FCML_REG_YMM6   6
 
#define FCML_REG_BH   7
 
#define FCML_REG_DI   7
 
#define FCML_REG_DIL   7
 
#define FCML_REG_EDI   7
 
#define FCML_REG_RDI   7
 
#define FCML_REG_MM7   7
 
#define FCML_REG_XMM7   7
 
#define FCML_REG_YMM7   7
 
#define FCML_REG_R8L   8
 
#define FCML_REG_R8W   8
 
#define FCML_REG_R8D   8
 
#define FCML_REG_R8   8
 
#define FCML_REG_XMM8   8
 
#define FCML_REG_YMM8   8
 
#define FCML_REG_R9L   9
 
#define FCML_REG_R9W   9
 
#define FCML_REG_R9D   9
 
#define FCML_REG_R9   9
 
#define FCML_REG_XMM9   9
 
#define FCML_REG_YMM9   9
 
#define FCML_REG_R10L   10
 
#define FCML_REG_R10W   10
 
#define FCML_REG_R10D   10
 
#define FCML_REG_R10   10
 
#define FCML_REG_XMM10   10
 
#define FCML_REG_YMM10   10
 
#define FCML_REG_R11L   11
 
#define FCML_REG_R11W   11
 
#define FCML_REG_R11D   11
 
#define FCML_REG_R11   11
 
#define FCML_REG_XMM11   11
 
#define FCML_REG_YMM11   11
 
#define FCML_REG_R12L   12
 
#define FCML_REG_R12W   12
 
#define FCML_REG_R12D   12
 
#define FCML_REG_R12   12
 
#define FCML_REG_XMM12   12
 
#define FCML_REG_YMM12   12
 
#define FCML_REG_R13L   13
 
#define FCML_REG_R13W   13
 
#define FCML_REG_R13D   13
 
#define FCML_REG_R13   13
 
#define FCML_REG_XMM13   13
 
#define FCML_REG_YMM13   13
 
#define FCML_REG_R14L   14
 
#define FCML_REG_R14W   14
 
#define FCML_REG_R14D   14
 
#define FCML_REG_R14   14
 
#define FCML_REG_XMM14   14
 
#define FCML_REG_YMM14   14
 
#define FCML_REG_R15L   15
 
#define FCML_REG_R15W   15
 
#define FCML_REG_R15D   15
 
#define FCML_REG_R15   15
 
#define FCML_REG_XMM15   15
 
#define FCML_REG_YMM15   15
 
#define FCML_REG_ES   0
 
#define FCML_REG_CS   1
 
#define FCML_REG_SS   2
 
#define FCML_REG_DS   3
 
#define FCML_REG_FS   4
 
#define FCML_REG_GS   5
 
#define FCML_REG_ST0   0
 
#define FCML_REG_ST1   1
 
#define FCML_REG_ST2   2
 
#define FCML_REG_ST3   3
 
#define FCML_REG_ST4   4
 
#define FCML_REG_ST5   5
 
#define FCML_REG_ST6   6
 
#define FCML_REG_ST7   7
 
#define FCML_REG_CR0   0
 
#define FCML_REG_CR2   2
 
#define FCML_REG_CR3   3
 
#define FCML_REG_CR4   4
 
#define FCML_REG_CR8   8
 
#define FCML_REG_DR0   0
 
#define FCML_REG_DR1   1
 
#define FCML_REG_DR2   2
 
#define FCML_REG_DR3   3
 
#define FCML_REG_DR4   4
 
#define FCML_REG_DR5   5
 
#define FCML_REG_DR6   6
 
#define FCML_REG_DR7   7
 
#define FCML_DS_UNDEF   0
 
#define FCML_DS_8   8
 
#define FCML_DS_16   16
 
#define FCML_DS_32   32
 
#define FCML_DS_64   64
 
#define FCML_DS_128   128
 
#define FCML_DS_256   256
 
#define FCML_OS_UNDEFINED   0
 
#define FCML_OS_BYTE   8
 
#define FCML_OS_WORD   16
 
#define FCML_OS_DWORD   32
 
#define FCML_OS_FWORD   48
 
#define FCML_OS_QWORD   64
 
#define FCML_OS_MWORD   64
 
#define FCML_OS_TBYTE   80
 
#define FCML_OS_OWORD   128
 
#define FCML_OS_XWORD   128
 
#define FCML_OS_YWORD   256
 
#define FCML_NUMBER_OF_CONDITIONS   8
 Number of supported condition types. More...
 
#define FCML_EN_ASF_ANY   0x00
 
#define FCML_EN_ASF_16   0x01
 
#define FCML_EN_ASF_32   0x02
 
#define FCML_EN_ASF_64   0x04
 
#define FCML_EN_ASF_ALL   FCML_EN_ASF_16 | FCML_EN_ASF_32 | FCML_EN_ASF_64
 

Typedefs

typedef enum fcml_en_operating_mode fcml_en_operating_mode
 Supported processor operating modes.
 
typedef fcml_uint16_t fcml_hints
 Type used for storing instruction and operand hint masks. More...
 
typedef fcml_uint16_t fcml_prefixes
 Type for explicit instruction prefixes bit mask.
 
typedef fcml_int64_t fcml_ip
 General instruction pointer holder.
 
typedef enum fcml_en_register fcml_en_register
 Register type. More...
 
typedef struct fcml_st_register fcml_st_register
 Structure describes x86_64 register.
 
typedef enum fcml_en_condition_type fcml_en_condition_type
 Condition type. More...
 
typedef struct fcml_st_condition fcml_st_condition
 Defines instruction's condition.
 
typedef struct fcml_st_nullable_size_flags fcml_st_nullable_size_flags
 Nullable wrapper for mask of size flags.
 
typedef enum fcml_en_access_mode fcml_en_access_mode
 Operand access mode.
 
typedef struct fcml_st_far_pointer fcml_st_far_pointer
 Representation of far pointer operand.
 
typedef enum fcml_en_address_form fcml_en_effective_address_form
 Addressing form. More...
 
typedef struct fcml_st_offset fcml_st_offset
 Absolute offset.
 
typedef struct fcml_st_effective_address fcml_st_effective_address
 Effective address.
 
typedef struct fcml_st_segment_selector fcml_st_segment_selector
 Describes segment register.
 
typedef struct fcml_st_address fcml_st_address
 Generic memory addressing operator.
 
typedef enum fcml_en_operand_type fcml_en_operand_type
 Supported operand types.
 
typedef enum fcml_en_operand_hints fcml_en_operand_hints
 Operand hints. More...
 
typedef struct fcml_st_operand fcml_st_operand
 Instruction operand. More...
 
typedef enum fcml_en_instruction_hints fcml_en_instruction_hints
 Instruction level hints. More...
 
typedef struct fcml_st_instruction fcml_st_instruction
 Generic instruction model. More...
 
typedef struct fcml_st_instruction_code fcml_st_instruction_code
 An encoded instruction.
 
typedef struct fcml_st_entry_point fcml_st_entry_point
 Describes address of an instruction code.
 

Enumerations

enum  fcml_en_operating_mode {
  FCML_OM_16_BIT = 1,
  FCML_OM_32_BIT,
  FCML_OM_64_BIT
}
 Supported processor operating modes. More...
 
enum  fcml_en_register {
  FCML_REG_UNDEFINED = 0,
  FCML_REG_GPR,
  FCML_REG_SIMD,
  FCML_REG_FPU,
  FCML_REG_SEG,
  FCML_REG_CR,
  FCML_REG_DR,
  FCML_REG_IP
}
 Register type. More...
 
enum  fcml_en_condition_type {
  FCML_CONDITION_O = 0,
  FCML_CONDITION_B,
  FCML_CONDITION_E,
  FCML_CONDITION_BE,
  FCML_CONDITION_S,
  FCML_CONDITION_P,
  FCML_CONDITION_L,
  FCML_CONDITION_LE
}
 Condition type. More...
 
enum  fcml_en_access_mode {
  FCML_AM_ACCESS_MODE_UNDEFINED = 0,
  FCML_AM_READ = 0x01,
  FCML_AM_WRITE = 0x02,
  FCML_AM_READ_WRITE = FCML_AM_READ | FCML_AM_WRITE
}
 Operand access mode. More...
 
enum  fcml_en_address_form {
  FCML_AF_UNDEFINED,
  FCML_AF_OFFSET,
  FCML_AF_COMBINED
}
 Addressing form. More...
 
enum  fcml_en_operand_type {
  FCML_OT_NONE,
  FCML_OT_IMMEDIATE,
  FCML_OT_FAR_POINTER,
  FCML_OT_ADDRESS,
  FCML_OT_REGISTER
}
 Supported operand types. More...
 
enum  fcml_en_operand_hints {
  FCML_OP_HINT_UNDEFIEND = 0x0000,
  FCML_OP_HINT_MULTIMEDIA_INSTRUCTION = 0x0001,
  FCML_OP_HINT_DISPLACEMENT_RELATIVE_ADDRESS = 0x0002,
  FCML_OP_HINT_PSEUDO_OPCODE = 0x0004,
  FCML_OP_HINT_ABSOLUTE_ADDRESSING = 0x0008,
  FCML_OP_HINT_RELATIVE_ADDRESSING = 0x0010,
  FCML_OP_HINT_SIB_ENCODING = 0x0020
}
 Operand hints. More...
 
enum  fcml_en_instruction_hints {
  FCML_HINT_NO_HINTS,
  FCML_HINT_FAR_POINTER = 0x0001,
  FCML_HINT_NEAR_POINTER = 0x0002,
  FCML_HINT_LONG_FORM_POINTER = 0x0004,
  FCML_HINT_INDIRECT_POINTER = 0x0008,
  FCML_HINT_DIRECT_POINTER = 0x0010
}
 Instruction level hints. More...
 

Detailed Description

Definitions of common structures used by FCML components.

Macro Definition Documentation

#define FCML_INSTRUCTION_SIZE   15

Maximal number of bytes instruction can use.

#define FCML_NUMBER_OF_CONDITIONS   8

Number of supported condition types.

#define FCML_OPCODES_NUM   3

Number of opcode bytes.

#define FCML_OPERANDS_COUNT   5

Maximal number of the instruction operands.

Typedef Documentation

Condition type.

Every conditional instruction has an appropriate condition type set. Following enumeration defines all supported types.

Addressing form.

Distinguish between two types of addressing forms: effective addressing and explicit absolute offset.

Instruction level hints.

Set of the hints that can be only defined on the level of the whole instruction. They can not be used with operands.

Operand hints.

Hints dedicated for instruction operands.

Register type.

Every register is represented as an integer value and it's register type. This enumeration provides all supported register types.

typedef fcml_uint16_t fcml_hints

Type used for storing instruction and operand hint masks.

Generic instruction model.

Generic instruction model (GIM) is a common structure used to describe instruction in a common way used by FCML assembler and disassembler.

Instruction operand.

Structure represents one instruction operand.

Enumeration Type Documentation

Operand access mode.

Enumerator
FCML_AM_ACCESS_MODE_UNDEFINED 

Undefined mode.

FCML_AM_READ 

Operand is read by instruction.

FCML_AM_WRITE 

Operand is set by instruction.

FCML_AM_READ_WRITE 

Operand is read but can be also set.

Addressing form.

Distinguish between two types of addressing forms: effective addressing and explicit absolute offset.

Enumerator
FCML_AF_UNDEFINED 

Default value set if memory addressing hasn't been configured.

FCML_AF_OFFSET 

Absolute offset (address).

FCML_AF_COMBINED 

Effective address combined from address components like base register, index registers, factor, displacement etc...

Condition type.

Every conditional instruction has an appropriate condition type set. Following enumeration defines all supported types.

Enumerator
FCML_CONDITION_O 

0 Overflow

FCML_CONDITION_B 

1 Below

FCML_CONDITION_E 

2 Equal

FCML_CONDITION_BE 

3 Below or equal

FCML_CONDITION_S 

4 Sign

FCML_CONDITION_P 

5 Parity

FCML_CONDITION_L 

6 Less than

FCML_CONDITION_LE 

7 Less than or equal to

Instruction level hints.

Set of the hints that can be only defined on the level of the whole instruction. They can not be used with operands.

Enumerator
FCML_HINT_NO_HINTS 

No hints defined.

FCML_HINT_FAR_POINTER 

Hints instruction to use FAR pointer to address the memory.

FCML_HINT_NEAR_POINTER 

Hints instruction to use NEAR pointer to address the memory.

FCML_HINT_LONG_FORM_POINTER 

This hint is used only by assembler in order to force it to generate three byte VEX/XOP prefix even if prefix fields fits into two bytes.

FCML_HINT_INDIRECT_POINTER 

Hints instruction to use INDIRECT pointer to address the memory.

FCML_HINT_DIRECT_POINTER 

Hints instruction to use DIRECT memory addressing.

Operand hints.

Hints dedicated for instruction operands.

Enumerator
FCML_OP_HINT_UNDEFIEND 

Undefined.

FCML_OP_HINT_MULTIMEDIA_INSTRUCTION 

SIMD operand.

All operands which uses SIMD registers (mmx, xmm, ymm) have this flag set. It is for instance used by Intel syntax renderer for data size operators (mmword ptr, xmmword ptr, ymmword ptr).

FCML_OP_HINT_DISPLACEMENT_RELATIVE_ADDRESS 

Relative address.

Flags set for all branches which use jumps calculated by displacement relative to the IP of the next instructions.

FCML_OP_HINT_PSEUDO_OPCODE 

Pseudo opcode.

Hint set for last operand (Intel syntax) which contains comparison predicate of the following instructions: CMPSD, VCMPSD, CMPSS, VCMPSS, VPCOMB, VPCOMW, VPCOMD, VPCOMQ, VPCOMUB, VPCOMUW, VPCOMUD, VPCOMUQ.

FCML_OP_HINT_ABSOLUTE_ADDRESSING 

Offset should be encoded as absolute address.

FCML_OP_HINT_RELATIVE_ADDRESSING 

Offset should be encoded as relative address.

FCML_OP_HINT_SIB_ENCODING 

Encode ModR/M with optional SIB byte if possible.

Supported operand types.

Enumerator
FCML_OT_NONE 

Operand not used.

FCML_OT_IMMEDIATE 

Immediate integer value.

FCML_OT_FAR_POINTER 

Direct far pointer.

FCML_OT_ADDRESS 

Memory address.

FCML_OT_REGISTER 

Processor register.

Supported processor operating modes.

Enumerator
FCML_OM_16_BIT 

Real-addressing mode, virtual 8086 mode.

FCML_OM_32_BIT 

Protected/Compatibility mode when 'D' segment descriptor flag is set to 1.

FCML_OM_64_BIT 

64-bit mode.

('L' flag of segment descriptor set to 1.)

Register type.

Every register is represented as an integer value and it's register type. This enumeration provides all supported register types.

Enumerator
FCML_REG_UNDEFINED 

Undefined register type.

FCML_REG_GPR 

General purpose register.

FCML_REG_SIMD 

SIMD (SSE, MMX) register.

FCML_REG_FPU 

FPU register.

FCML_REG_SEG 

Segment register.

FCML_REG_CR 

Control register.

FCML_REG_DR 

Debug register.

FCML_REG_IP 

Instruction pointer register.

Used for relative RIP addressing.